Group III-V single crystal semiconductor thin layers including nitride, and group II-VI single crystal semiconductor thin layers including oxide are grown on the upper portion of a transparent growth substrate at a temperature of about 400° C. or more and in atmosphere of various types of severe gas.
In general, a growth substrate is formed of sapphire (Al2O3), silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), zinc oxide (ZnO), or silicon (Si).
Especially, sapphire is economically and technically advantageous, and thus, it is widely used. However, since the electrical and thermal conductivities of a growth substrate formed of sapphire are even poorer than that of a growth substrate formed of other materials such as Si, it is difficult to manufacture high performance electronic devices or photoelectric devices on the growth substrate formed of sapphire.
For example, when a single crystal thin layer formed of gallium nitride (GaN), which is a group III-V semiconductor, is grown on a growth substrate formed of sapphire to manufacture a light emitting diode (LED) that is a photoelectric device, it is difficult to dispose two electrodes for applying an external current to the LED in a vertical structure facing the upper and lower sides of the single crystal thin layer, due to the sapphire growth substrate that is electrically insulated.
Thus, to apply the external current to the two electrodes of the LED, MESA etching is performed such that the gallium nitride layer adjacent to the sapphire growth substrate is exposed to air, and electrodes are separately disposed in a horizontal structure on the upper portion of the gallium nitride single crystal thin layer, which have different charge carriers.
However, the LED having a horizontal structure generates a large amount of heat due to current crowding that an applied external current is collected on an edge that is MESA-etched. In addition, due to lower thermal conductivity of the sapphire growth substrate, it is difficult to emit the large amount of heat generated when the device is driven, to the outside. Especially, this difficulty negatively affects the service life and reliability of a device driven when applying a large current.
To address the current crowding and inefficient heat emission, a vertical device manufacturing method has been suggested in which a support having excellent electrical and thermal conductivities is formed on the upper portion of the single crystal semiconductor thin layer at the opposite side to the sapphire growth substrate, and a photon-beam having a band of a specific wavelength is irradiated on the rear surface of the sapphire growth substrate, so that the single crystal semiconductor thin layer is lifted off from the sapphire growth substrate and transferred.
The effect of the vertical device manufacturing method through the lifting-off and transferring of the single crystal semiconductor thin layer depends on how effectively the support having excellent electrical and thermal conductivities is formed.
Methods of forming a closely adhered support include an electro-plating process and a wafer bonding process, which are applied to partially form a vertical device.
When the electro-plating process is applied to form a closely adhered support, it is relatively easy to form a vertical device, but a final product has poor reliability.
Meanwhile, as illustrated in FIGS. 1A to 1E, when a support formed through a wafer bonding process is used, a process is relatively simple, and a final product has excellent reliability.
FIGS. 1A to 1E are cross-sectional views illustrating wafer bonding between dissimilar materials and a single crystal semiconductor thin layer transfer process in the related art.
Referring to FIG. 1A, first, a single crystal multi-layer thin layer 102 for an electronic or photoelectric device including a gallium nitride (GaN)-based semiconductor is grown on a transparent sapphire growth substrate 101 at a temperature of 500° C. or more in atmosphere of various types of severe gas, and then, a soldering material 103 for wafer bonding is continuously formed on the single crystal multi-layer thin layer 102. The soldering material 103 may be alloy or solid solution containing metal having a melting point less than 300° C. such as indium (I), stannum (Sn), or zinc (Zn).
Then, referring to FIG. 1B, the same material as the soldering material 103 formed on the single crystal multi-layer thin layer 102 or a soldering material 202 including a metal forming soldering alloy and used for wafer bonding is formed on a support 201 having excellent electrical and thermal conductivities. For example, the support 201 may be formed of Si, Ge, or GaAs, and the soldering materials 103 and 202 may be formed of Au—Sn, Au—In, or Pd—In.
Referring to FIG. 1C, after operation S10 in which the two wafers are prepared as described above, the wafers are bonded by bring the soldering materials 103 and 202 to contact with each other at a temperature less than 300° C. and a predetermined pressure.
After operation S20 in which the two wafers are bonded as described above, a photon-beam having a band of a specific wavelength is irradiated on the rear surface of the sapphire growth substrate 101, so that the single crystal semiconductor thin layer 102 is lifted off from the sapphire growth substrate (refer to FIG. 1D) and transferred to the upper side of the support 201 in operation S30 (refer to FIG. 1E).
After that, although not shown, high performance electronic or photoelectric devices having various dimensions and shapes are formed.
However, the above-described wafer bonding process requires wafer bonding between materials having different thermal expansion coefficient, which is not easy. Especially, due to thermal shock generated after wafer bonding between different materials, a growth substrate, a single crystal semiconductor thin layer, and a support may have defects such as a crack, a breakage, and debonding.
In addition, a limitation that a wafer bonding temperature less than 300° C. is required to minimize thermal stress generated after wafer bonding, and limitations caused by a soldering material should be solved. Furthermore, a wafer bonding process adapted for mass production is required.
Thus, to solve the above-described limitations and reduce manufacturing costs of electronic or photoelectric devices through mass production, a method of transferring a single crystal semiconductor thin layer to the upper side of a dissimilar support substrate should be developed, and simultaneously, a method of manufacturing high performance electronic or photoelectric devices using this method should be developed.